In the field of semiconductor automatic test equipment, multi-level printed circuit boards (PCB's) play a critical role in routing numerous signals between fairly large test subsystems, and relatively small devices under test (DUT's). The equipment, often individually referred to as a "tester", generates and receives test data signals and test control signals to and from one or more DUT's. Depending on whether the tester is of the "prober" type or "package" type, the tests take place at the wafer and packaged-device levels, respectively.
To functionally test devices at the wafer level, the conventional probe type tester generally includes a test controller, such as a computer, that generates waveforms to be applied to one or more of the wafer DUT's. A test head is disposed downstream of the test controller and includes pin electronics for generating test signals in fairly close proximity to the DUT's to minimize time delays and signal attenuation. Data and control signals are routed from the pin electronics through a probecard that physically interfaces with one or more DUT's on the wafer. The signals generated by the test controller are fed to the DUT's that produce responsive output signals. The probecard captures and transmits the DUT outputs back to the test controller for comparison with sets of expected output values.
Key considerations in the selection of automatic test equipment involve the cost per DUT "site", testing capabilities of the tester, and device interface flexibility. The cost consideration may be further broken down to initial purchase price of the tester, facilities costs, wafer throughput, and yield. Wafer throughput reflects the number of wafers processed per unit time, while the yield refers to the number of acceptable devices that survive test versus the original volume of devices. Consequently, the more DUT's that can be tested in parallel, the higher the throughput. One area open to improvement in this regard is the construction of a probecard that allows simultaneous testing of fairly large arrays of DUT's such as memory devices.
Conventional probe card constructions often employ a multi-level PCB formed with a peripheral annular array of spaced-apart contact pads for engaging corresponding test head contacts or pogos. The center of the board is formed with a relatively small rectangular opening around which is disposed a plurality of contacts corresponding to the spaced-apart peripheral pads. The contacts and pads are coupled electrically through the multiple layers of the card by cylindrical conductive vias. The vias are formed with a predetermined diameter and disposed vertically through one or more layers of the card to serve as inter-layer paths. An array of formed tungsten needles couples to the contacts and projects inwardly and downwardly toward one or more DUT pads as the opening is registered over the DUT. Each needle is about an inch in length.
In operation, the test head of the tester manipulates the probecard needles for registration over a plurality of DUT contacts. The probecard is then positioned to allow the needles to physically engage the DUT contacts on the wafer. Test signals are then generated by the tester pin electronics and applied to the DUTs in parallel. When the array of DUTs finishes test, the probe card is manipulated to engage another array of DUTs. This process repeats a number of times until the wafer is substantially fully probed.
While the foregoing tester construction is beneficial for its intended applications, it suffers from several disadvantages. For example, under circumstances requiring simultaneous testing of fairly large DUT arrays having 32 or more devices, the use of needles becomes cumbersome and somewhat difficult to implement. Moreover, the lengths of the needles often creates a non-50 ohm environment, due to inductive effects, that often limits the testing bandwidth to about 60 MHz or less.
What is needed and heretofore unavailable is a PCB probecard for use in a tester to efficiently rout a large number of high frequency, impedance matched signal paths through the various layers of the probecard to couple relatively spaced-apart contact pads to corresponding contacts disposed in a densely packed prober array. The high density probe card and method of manufacture of the present invention satisfies these needs.